SerDes Circuit Design Engineer
Santa Clara Valley (Cupertino),California,United States
Hardware
You should have experience in high-speed serial links with expertise in the following:
Deep knowledge in high-speed SerDes protocols (e.g., PCIe, USB, SATA, etc.).
Proven knowledge of analog CMOS designs and topologies.
Deep experience with Tx & Rx equalization techniques and circuits.
Significant experience with high speed digital circuit (e.g., serializer, deserializer, counters, dividers, etc.) design, analysis and verification (e.g., STA, formal verification).
Deep experience in analyzing link jitter budget for high-speed serial links and crafting block level requirements.
Solid understanding of different CDR architectures.
Experience in lab testing of high-speed serial links and defining equipment needs.
Description
Ownership of analog and digital circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, clock generation and distribution, etc.). Work well with multi-functional teams to define requirements/specs (e.g., modeling, package, board, DFT, ESD, etc.). Craft block-level specifications based on link-budget, behavioral modeling, and transistor-level feasibility. Work closely with mask design to implement layout view of designs. Generation/QA of various IP Kit views/files for release to IP consumers. Defining production/bench-level testplans. Hold design reviews of blocks with peers/management to show design meets spec targets and requirements.
Education & Experience
Masters degree with 7 years experience or PhD with 5 years experience Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
Additional Requirements
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